The hardware nobody talks about — cryogenics, wafer tools, and the edge of the quantum stack

Every conversation about quantum computing eventually arrives at the qubit: how many, how stable, how error-prone. The qubit is the unit of quantum progress, and the industry measures itself accordingly.

However, a qubit does not exist in isolation. It lives inside a precisely engineered environment, one that must maintain temperatures colder than outer space, filter out electromagnetic noise, and deliver control signals with picosecond-level accuracy. Strip away that environment, and quantum computation simply does not happen.

The quantum cryogenic systems and wafer tools that create and sustain that environment are among the least-discussed technologies in the quantum stack. Yet they are among the most consequential. As quantum systems grow in complexity and scale, the precision hardware at the edge of the stack is increasingly becoming a bottleneck in its own right.

At the Quantum Computing Infra Summit 2026 in Silicon Valley, a dedicated panel will bring together the leaders building this infrastructure: Precision at the Edge — Wafer Tools and Cryogenic Systems. This is a look at what they are working on, and why it matters.

To understand why cryogenic and wafer-level hardware is so challenging, it helps to understand what quantum processors demand from their environment.

Superconducting qubits, currently the most widely deployed quantum hardware platform, must operate at around 15 millikelvin. That is approximately 180 times colder than deep space. Reaching and holding those temperatures requires dilution refrigerators: specialised cryogenic systems that use a mixture of helium isotopes to achieve conditions found nowhere in nature.

This extreme cold must also be maintained continuously as systems grow larger with every hardware generation. Today, a processor with hundreds of qubits already demands significant cryogenic capacity. Tomorrow, a fault-tolerant system with millions of physical qubits will require infrastructure at a scale the industry has not yet built.

On the fabrication side, wafer-level tools must achieve precision levels that push well beyond what classical semiconductor manufacturing treats as standard. Consequently, both sides of the hardware stack, fabrication and operation, are advancing simultaneously, each with its own set of unsolved engineering challenges.

Cryogenic refrigeration for quantum computing is not a commodity technology. Rather, it is a specialised engineering domain served by a small number of expert organisations worldwide.

Dr. David Gunnarsson, Chief Business Development Officer at Bluefors, leads commercial strategy at one of the world's foremost providers of dilution refrigerator systems. Bluefors has become a central infrastructure partner for quantum hardware companies globally, supplying the cryogenic environments that make superconducting qubit operation possible.

The challenge is not simply building refrigerators that are cold enough. Systems must also be large enough, modular enough, and reliable enough to support quantum processors as they scale. Furthermore, as qubit counts increase, the number of control lines multiplies accordingly. Each additional line introduces potential thermal load and electromagnetic interference — and managing that complexity at millikelvin temperatures is a serious systems engineering problem.

Scaling quantum cryogenic systems to support utility-grade processors therefore requires more than building bigger refrigerators. It demands a rethink of how cryogenic infrastructure is designed, modularised, and integrated with the quantum hardware it houses.

On the fabrication side, quantum devices demand process control that challenges even the most advanced semiconductor equipment available today.

Dr. Om Nalamasu, Senior Vice President and Chief Technology Officer at Applied Materials, oversees technology development at one of the semiconductor industry's most influential equipment companies. Applied Materials supplies the deposition, etching, and inspection tools that define what is manufacturable at any given point in the industry's evolution.

Quantum applications shift the priority entirely. Standard process nodes are not the primary concern. What matters instead is material purity, interface quality, and defect density — at scales where a single atomic imperfection can measurably degrade qubit performance. Nalamasu's perspective directly bridges today's semiconductor equipment capabilities and what quantum device fabrication actually demands.

Dr. June Shin, Senior Executive Officer and Head of Semiconductor and Electronics Business Development at ULVAC, brings a complementary view. ULVAC specialises in vacuum technology and thin-film deposition equipment — both central to quantum device fabrication. As developers push for tighter process control and higher-purity materials, vacuum deposition tools are growing in strategic importance across the quantum manufacturing stack.

Together, Applied Materials and ULVAC illustrate a broader truth about quantum wafer tools: the equipment ecosystem supporting quantum fabrication is not a subset of classical semiconductor tooling. It is an evolving specialisation in its own right.

Between fabrication and operation lies a third category of hardware that is equally critical: measurement and characterisation equipment. Without the ability to accurately measure what a quantum device is doing, neither fabrication nor operation can be reliably improved.

Dr. Philip Krantz, Deputy General Manager of Quantum Engineering Solutions at Keysight Technologies, works at this precise intersection. Keysight has built a strong position in quantum test and measurement. Its instruments and software platforms help researchers characterise qubit performance, validate gate operations, and diagnose sources of error.

As quantum systems scale, measurement infrastructure must scale with them. Characterising a handful of qubits requires relatively modest instrumentation. Hundreds or thousands of qubits, however, demand automated, high-throughput workflows that do not yet exist in mature form. Consequently, measurement capability is becoming a gating factor in the pace of quantum hardware development.

Brennan Peterson, Vice President of Test and Measurement at PsiQuantum, approaches this challenge from the hardware developer's side. PsiQuantum is building a photonic quantum computer in partnership with a leading semiconductor foundry. The test and measurement requirements Peterson's team faces are unlike those of any other quantum hardware programme underway. Accordingly, the solutions they develop will likely shape how the broader industry approaches device characterisation at scale.

For much of quantum computing's development, quantum cryogenic systems and wafer tools were treated as supporting infrastructure — important, certainly, but downstream of the core physics and hardware challenges. That framing is changing.

As the industry moves toward utility-grade deployment, the supporting infrastructure is increasingly determining what is possible. Hardware companies with strong qubit designs are finding their roadmaps constrained not by physics, but by what the surrounding equipment ecosystem can actually deliver.

This shift carries real consequences. Equipment and infrastructure companies are gaining strategic importance that was not widely recognised even two or three years ago. Meanwhile, the development of quantum cryogenic systems and precision wafer tools is emerging as an area requiring dedicated investment — not simply adaptation of existing semiconductor equipment. The organisations that solve these infrastructure challenges earliest will build durable advantages that extend well beyond their own hardware programmes.

In short, the edge of the quantum stack is becoming its centre of gravity. The panel at the Quantum Computing Infra Summit 2026 will put that shift in focus.